A Methodology for CFD Acceleration through Reconfigurable Hardware
نویسندگان
چکیده
Esther Andrés∗ Instituto Nacional de Técnica Aeroespacial, Torrejón de Ardoz, Madrid, 28850, Spain Carlos Carreras† and Gabriel Caffarena‡ Universidad Politécnica de Madrid, Madrid, 28040, Spain Maria del Carmen Molina§ Universidad Complutense de Madrid, Madrid, 28040, Spain Octavio Nieto-Taladriz¶ Universidad Politécnica de Madrid, Madrid, 28040, Spain Francisco Palacios‖ Instituto Nacional de Técnica Aeroespacial, Torrejón de Ardoz, Madrid, 28850, Spain
منابع مشابه
Real-Time, Dynamic Hardware Accelerators for BLAS Computation
This paper presents an approach to increasing the capability of scientific computing through the use of real-time, partially reconfigurable hardware accelerators that implement basic linear algebra subprograms (BLAS). The use of reconfigurable hardware accelerators for computing linear algebra functions has the potential to increase floating point computation while at the same time providing an...
متن کاملOn Feasibility of Adaptive Level Hardware Evolution for Emergent Fault Tolerant Communication
A permanent physical fault in communication lines usually leads to a failure. The feasibility of evolution of a self organized communication is studied in this paper to defeat this problem. In this case a communication protocol may emerge between blocks and also can adapt itself to environmental changes like physical faults and defects. In spite of faults, blocks may continue to function since ...
متن کاملAn Analysis Tool Set for Reconfigurable Media Processing
Existing media processing solutions such as general purpose processors with media acceleration support or application specific hardware units fail to satisfy the constraints of low power, less silicon area and varying computing demands of the applications. Our research effort aids the design of a dynamically reconfigurable processor through the use of a set of analysis and design tools. This pa...
متن کاملPredicting Hardware Acceleration Through Object Caching in AMIDAR Processors
Dynamically reconfigurable architectures offer the opportunity to migrate software into hardware functional units at runtime. Architectures derived from the AMIDAR model exhibit such possibilities. In previous work we have shown how to identify heavily used code sequences and have also shown that it might be interesting to synthesize hardware for a set of methods of one class and also cache the...
متن کاملFast Evaluation Methodology for Automatic Custom Hardware Prototyping
Hardware customization for scientific applications has shown a big potential for reducing power consumption and increasing performance. In particular, the automatic generation of ISA extensions for General-Purpose Processors (GPPs) to accelerate domain-specific applications is an active field of research to accelerate [1], [2]. Those domain-specific accelerated processors are mostly evaluated i...
متن کامل